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言語種別	英語
発行・発表の年月	2011/07
形態種別	学術論文
査読	査読あり
標題	A 14.3% PAE Parallel Class-A and AB 60 GHz CMOS PA
執筆形態	共著
掲載誌名	IEICE Electronics Express
掲載区分	国内
概要	At 60GHz, it becomes difficult to achieve a high power added efficiency(PAE) and large output power for CMOSpower amplifier (PA). A parallel class-A and AB pseudo Doherty PA is designed in CMOS 65nm process to obtain a high PAE and large output power. The PA achieves a 9.8-dB gain at 60GHz. The measured large signal results show that a maximum power added efficiency (PAE) of 14.3% and 12.0% at 1dB compression point are realized. The chip consumes 45∼58mW power from a 1.2-V supply voltage. The chip area is 0.6mm2 including pads. 主筆