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言語種別	英語
発行・発表の年月	2011/12
形態種別	学術論文
標題	A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c
執筆形態	共著
掲載誌名	IEEE Journalof Solid-State Circuits
掲載区分	国内
概要	This paper presents a 60-GHz direct-conversion transceiver using 60-GHz quadrature oscillators. The transceiver has been fabricated in a standard 65-nm CMOS process. It in cludes a receiver with a 17.3-dB conversion gain and less than 8.0-dB noise figure, a transmitter with a 18.3-dB conversion gain, a 9.5-dBm output 1 dB compression point, a 10.9-dBm saturation output power and 8.8%power added efficiency. The 60-GHz frequency synthesizer is implemented by a combination of a 20-GHz PLL and a 60-GHz quadrature injection-locked scillator, which achieves a phase noise of -95 dBc/Hz@l MHz-offset at 60 GHz. The transceiver realizes IEEE802.15.3c full-rate wireless communication for all 16QAM/8PSK/QPSK/BPSK modes, and the communication distances with the full data rate using 2.16-GHz bandwidth, measured with an antenna built in the package,are 2.7-m (BPSK/QPSK) and 0.2-m (8PSK/16QAM). The measured maximum data rates are 8 Gb/s in QPSK mode and 11 Gb/s in 16QAM mode over a 5 cm wireless link within a bit error rate(BER) of <10 -3 . The transceiver consumes 186 mW from a 1.2-V supply voltage while transmitting and 106 mWfrom 1.0-V supply voltage while receiving. Both transmitter and receiver are driven by a 20-GHz PLL, which consumes 66 mW, including　output buffer, from a 1.2-V supply voltage. 副筆